Linking Engineering & Effective Simulation To Enhance Performance: Semiconductors

Jai has been associated with ANSYS for over a decade now, prior to which he worked with Alliance Semiconductor, Texas Instruments, and Apache Design Solutions.

Simulation is at the heart of modern day product designs. What every product needs is a clear simulation path right from the ideation stage to design and up to testing. This enables engineers to explore more designs in less time, and ultimately, every company can get their products to market sooner at less cost thanks to simulation. When it comes to the engineering workflow, any hold-up, however small, slows down the entire process and can be catastrophic.

The tiny yet powerful semiconductor chips support the success of all futuristic technologies, be it driverless cars, self-guided rockets, 5G-enabled devices or even crypto currency. In order for a simulator to be successful as an efficient engineering solution for semiconductors, it needs certain characteristics. This includes Accuracy/Signoff, Results in Time of Relevance, Capacity/Hierarchy/Abstractions, Us-ability & Flow Integration, Generality and Robustness to Corner Cases, among others.

Performance Enhancement
Let us take the new age of semiconductors that is set to empower transformational products. The key metrics when it comes to semiconductors are the PPA (power, performance, area) and reliability. They are driven by Artificial intelligence (AI), 5G, autonomous systems, augmented/virtual reality (AR/VR) and high-performance computing. In fact, engineers use standards to design semiconductors that meet the industry requirements.

Concerns That Arise
The chip that is at the centre of every electronics system, and must meet multiple conflicting requirements. There are many challenges that can crop-up while designing semiconductors for high-performance applications due to the interactions of multiple physics. To achieve good performance, engineers need to leverage low-power fin field effect transistor (FinFET) and 2.5/3D integrated circuit (2.5D/3D-IC) packaging technologies. Some of the challenges can be due to the impact of power on thermal profiles, and some may be due to thermal profiles on reliability. It can also arise due to power-noise on timing or even electromagnetic cross-talk on performance.

Be it the product idea stage or the launching of the product, be it a beginner or an expert, simulations ensures a smooth workflow at all times

Old-style, margin-based siloed methods will not be able to precisely model the cross-coupling multi physics effects that can cause silicon failures. The need of the hour in such a situation is multi physics simulation. That is what can ensure the reliability and performance of these complex electronic systems. These simulations enable engineers to capture various failure mechanisms and ensure that the product they are designing is a success the first time itself. Multiple re-iterations are not needed when multi physics simulation is being used.

To be clear, multi physics is not the same as multiple physics. Traditionally, simulators have each focused on a single physics domain ­ whether it be thermal, reliability, voltage drop, or whatever. The complicated and intimate interactions between components on today's high-density designs require a simultaneous, integrated multi physics view that can securely guide designers across a bewilderingly complex landscape of trade-offs and inter-related design choices.

Engineers often end-up having to make certain compromises between power efficiency and high performance. A low power design is needed to ensure that smartphones have long battery life and electric motors run as peak efficiency. Without adequate multi physics simulation, engineers end-up over-designing their systems, and this ultimately leads to more expenses and inefficiencies in the product.

Dealing With Variability
Any variability can be catastrophic in technology. Be it a variability in process due to small geometries or a variability in voltage drop due to changing workloads. It could also be a variability in the current distribution due to electromagnetic effects or in temperature due to self-heating and Joule heating. Thus, in ultra-low-voltage semiconductor designs, the design performance is seriously impacted with power-noise-reliability issues. Issues like low voltage noise impact the speed of transistors and seriously affect the system performance.

These inconsistencies can amplify multi physics problems which will have a direct impact on the performance of silicon. This can lead to the failure of margin-based siloed simulation methodologies to design the highest performing silicon chips. Ensuring the chip meets power efficiency, power integrity and reliability requirements as both a stand-alone component and within the electronics system calls for a system-aware chip design methodology. With a comprehensive chip package and system multiphysics, the solutions are optimized to help engineers discover and solve these issues to achieve the required PPA and reliability goals.

Multi physics Simulation
Multi physics analysis is critical for enabling these cut-ting-edge electronics systems to work reliably throughout their lifetime. Multi physics simulations also simultaneously solve power, thermal, variability, timing, electromagnetics and reliability challenges across the spectrum of chip, package and system to promote first-time silicon and system success. Simulation and modeling tools also offer early power budgeting analysis for high-impact design decisions and foundry-certified accuracy needed for IC signoff.

A semiconductor portfolio of power efficiency, power integrity and reliability solutions is what comes to the rescue. Automotive IC designers can meet rigorous safety requirements for ADAS and autonomous applications. Auto chip makers can leverage multi physics simulations for all ISO 26262 safety-related development projects at any Automotive Safety Integrity Level.

Comprehensive Power Reliability and Optimizations solutions spanning all the way from the architecture level to chip, package and system can be used to sign-off SoC or IP design. Apart from that, designers can analyze, debug and reduce power at the RTL level as well by using multi physics simulation. It also enables one to perform on-chip static and dynamic voltage drop analysis, electro migration, design weakness and hot spot analysis. You can also detect and debug structural weaknesses in your design to prevent electrostatic discharge failures using simulation and thus sign-off on reliability.

In summary, what engineers need today is an easy access to simulation throughout the design, testing and operation processes. This way, they will not have to slow down at any point and can leverage pervasive simulation thanks to advancements in computational fluid dynamics (CFD). Be it the product idea stage or the launching of the product, be it a beginner or an expert, simulations ensures a smooth workflow at all times. Designers can extensively use simulation techniques to mitigate issues and increase the system performance.